STM32F411 Programming Manual

Description

This PDF programming manual is for the ST STM32F411xC / STM32F411xE microcontrollers.

STM32F411xC / STM32F411xE microcontrollers – STM32 Cortex-M4 MCUs and MPUs programming manual

Part numbers: STM32F411CC STM32F411RC STM32F411VC STM32F411CE STM32F411RE STM32F411VE

This programming manual provides information for application and system-level software developers. It gives a full description of the STM32 Cortex-M4 processor programming model, instruction set and core peripherals.
The Cortex-M4 processor used in STM32F3 Series, STM32F4 Series, STM32G4 Series, STM32H745/755 and STM32H747/757 Lines, STM32L4 Series, STM32L4+ Series, STM32WB Series, STM32WL Series and STM32MP1 Series, is a high performance 32-bit processor designed for the microcontroller and microprocessor market.

(PDF) PROGRAMMING MANUAL in English (EN) language.

CONTENTS:

ABOUT THIS DOCUMENT
– Typographical conventions
– List of abbreviations for registers
– About the STM32 Cortex-M4 processor and core peripherals

THE CORTEX-M4 PROCESSOR

– Programmers model
This section describes the Cortex-M4 programmer’s model. In addition to the individual core register descriptions, it contains information about the processor modes and privilege levels for software execution and stacks.

– Memory model
This section describes the processor memory map, the behavior of memory accesses, and the bit-banding features. The processor has a fixed memory map that provides up to 4 GB of addressable memory.

– Exception model
This section describes the exception model.

– Fault handling
Faults are a subset of the exceptions.

– Power management
The STM32 and Cortex-M4 processor sleep modes reduce power consumption. This section describes the mechanisms for entering sleep mode, and the conditions for waking up from sleep mode.

THE STM32 CORTEX-M4 INSTRUCTION SET
This chapter is the reference material for the Cortex-M4 instruction set description in a User Guide.

– Instruction set summary
The processor implements a version of the thumb instruction set.

– CMSIS intrinsic functions
ISO/IEC C code cannot directly access some Cortex-M4 instructions. This section describes intrinsic functions that can generate these instructions, provided by the CMIS, and that might be provided by a C compiler. If a C compiler does not support an appropriate intrinsic function, you might have to use an inline assembler to access some instructions.

– About the instruction descriptions
The following sections give more information about using the instructions.

– Memory access instructions

– General data processing instructions

– Multiply and divide instructions

– Saturating instructions
This section describes the saturating instructions.

– Packing and unpacking instructions

– Bitfield instructions

– Floating-point instructions
These instructions are only available if the FPU is included, and enabled, in the system.

– Miscellaneous instructions

CORE PERIPHERALS

– About the STM32 Cortex-M4 core peripherals
The address map of the Private peripheral bus (PPB).

– Memory protection unit (MPU)
This section describes the Memory protection unit (MPU) which is implemented in some STM32 microcontrollers. Refer to the corresponding device datasheet to see if the MPU is present in the STM32 type you are using.

– Nested vectored interrupt controller (NVIC)
This section describes the Nested Vectored Interrupt Controller (NVIC) and the registers it uses.

– System control block (SCB)
The System control block (SCB) provides system implementation information, and system control. This includes configuration, control, and reporting of the system exceptions.

– SysTick timer (STK)
The processor has a 24-bit system timer, SysTick, that counts down from the reload value to zero, reloads (wraps to) the value in the STK_LOAD register on the next clock edge, then counts down on subsequent clocks.

– Floating point unit (FPU)
The Cortex-M4F FPU implements the FPv4-SP floating-point extension. The FPU fully supports single-precision add, subtract, multiply, divide, multiply and accumulate, and square root operations. It also provides conversions between fixed xxxxxpoint and floating-point data formats, and floating-point constant instructions. The FPU provides floating-point computation functionality that is compliant with the ANSI/IEEE standard 754-2008, IEEE standard for Binary Floating-Point Arithmetic, referred to as the IEEE 754 standard. The FPU contains 32 single-precision extension registers, which you can also access as 16 doubleword registers for load, store, and move operations.

DOCUMENT REVISION HISTORY

TABLES

This document provides the information required for application and system-level software development. It does not provide information on debug components, features, or operation. This material is for microcontroller software and hardware engineers, including those who have no experience of Arm products.

This programming manual provides all the information (according to the table of contents) from STMicroelectronics about the STM32F411 Microcontroller. You can download and save it for offline use, including viewing it on your device or printing it for your convenience if you prefer a paper version.

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